Conventional image processing apparatuses convert an analog image signal, which is acquired by reading an original image using photoelectric conversion elements, to digital image data using a signal processing integrated circuit called an Analog Front-End (hereinafter referred to as “AFE”) circuit, and then perform various digital correction processing on the converted digital image data.
FIG. 27 is a circuit diagram showing a structure of an AFE circuit 50 used in an image processing apparatus according to a conventional technology. FIG. 28 is a timing chart at the time when image processing is performed in the AFE circuit 50 of FIG. 27. The image processing apparatus according to the conventional technology converts analog image signals of respective color components of R (red), G (green) and B (blue) input from a CCD (Charge-Coupled Device) to digital image data using the AFE circuit 50 of FIG. 27. Respective systems performing image processing of R, G and B have similar structures.
As illustrated in FIG. 27, in the AFE circuit 50, a clamping circuit 51 applies a predetermined offset voltage (direct-current potential) to an input analog image signal. Then, a sample and hold circuit 52 converts the analog image signal, which includes reset noise, a feed-through level and the like, to a continuous analog image signal by performing sampling and holding operations in response to sampling pulses. An amplifier (VGA) 53 amplifies the analog image signal to a reference voltage level of A/D conversion, and an A/D conversion circuit (referred to as “ADC”) 54 analog/digital-converts the amplified analog image signal to 10 bit digital image data.
A black offset level correction circuit 55 of FIG. 27 includes an averaging unit 551, a correction calculating unit 552, a D/A conversion circuit (referred to as “DAC”) 553 and the like. The black offset level correction circuit 55 performs black offset correction described below. Here, a period of time when no light is incident on the CCD is referred to as the dark period, and an analog image signal input from the CCD to the AFE circuit 50 during the dark period is referred to as the dark period analog image signal. In addition, digital image data corresponding to the dark period analog image signal converted by the AFE circuit 50 are referred to as dark period digital image data, and a level (value) of the dark period digital image data is referred to as the black offset level. The averaging unit 551 calculates an average value of dark period digital image data of plural pixels. This process is performed in order to calculate the black offset level before correction and a noise component is removed by performing an averaging process. The dark period digital image data are output from the ADC 54 to the black offset level correction circuit 55 during an OPB (Optical Black) pixel transfer period (a period during which effective but optically masked pixels are transferred) within a main scanning line period, as shown in FIG. 28(B), or during an idle transfer period and when a black clamping signal BLKCLP of FIG. 28(C), generated by a timing signal generating circuit (not shown), is at H level. That is, the black offset level correction circuit 55 detects a current black offset level for each main scanning line period. Thus, the black offset level correction circuit 55 performs feedback control by applying an analog offset voltage to an analog image signal, which is input to the ADC 54 in an analog fashion via the DAC 553, so that the black offset level becomes a predetermined level.
In general, the dark period digital image data value output from the AFE circuit 50 is preferably 0 or more. The ADC 54 does not output a value less than 0 (i.e., a negative value), including noise of data, and therefore, the dark period digital image data value being 0 means that the dark period digital image data are saturated (refer to FIGS. 5 and 7). Accordingly, the voltage of the dark period analog image signal input to the ADC 54 has to be equal to or greater than a lower limit voltage of the dynamic range of the ADC 54 (at this point, the ADC 54 outputs a data value equal to or greater than 0).
Therefore, as black offset correction, the black offset level correction circuit 55 applies an offset voltage to the analog image signal in such a manner that the dark period digital image data value including random noise of the dark period analog image signal and output from the ADC 54 is equal to or greater than 0. In the example of FIG. 27, the black offset level correction circuit 55 performs operations in such a manner that the level of the dark period digital image data (i.e., the black offset level) output from the ADC 54 becomes 10 bits long and 40, which is a target value of the black offset level. The target value depends on the noise level of data of the image processing apparatus, and can be set externally via a CPU interface (not shown) of the AFE circuit 50.
In the case when the dark period digital image data value described above is different from a target value Dave_n, 40, first, the correction calculating unit 552 calculates a difference Δ between the dark period digital image data value and the target value Dave_n, 40. Next, the DAC 553 converts the difference Δ to an analog voltage and feeds it back. Here, when the dynamic range of the ADC 54 is VAD [V], the resolution of the ADC 54 is 10 bits, and the gain of the VGA 53 is α [times], a voltage VOF required to correct the difference Δ can be obtained by the following formula (1).
[Formula 1]VOF=Δ÷1023×VAD÷α  (1)
Herewith, the DAC 553 needs to generate and output adequate voltage. If the resolution of the DAC 553 is 12 bits and the dynamic range of the DAC 553 is VDC [V], it is necessary to set VOF÷VDC×4095 types of codes as setting codes of the DAC 553. The correction calculating unit 552 performs these calculation operations, feeds back the difference Δ between the output data of the ADC 54 and the target value as an analog quantity, and performs black offset correction for each main scanning line period in such a manner that the difference Δ comes close to 0.
In fact, if an analog offset voltage corresponding to the difference Δ detected during a single main scanning line period is fed back for the next main scanning line period at once, the output data of the ADC 54 may oscillate rather than converge to the target value due to variability in the dynamic ranges of the ADC 54 and the DAC 553 and noise included in the difference Δ. Therefore, the black offset correction is performed using a value obtained by multiplying the difference Δ by a coefficient β smaller than 1. Accordingly, the output data of the ADC 54 is not corrected to be the target value in a single black offset correction, but rather corrected to gradually follow the target value in several black offset corrections.